PANASONIC TC21S4RC
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Philips Semiconductors

BLV859 UHF linear push-pull power transistor
1 ABSTRACT

Application Note AN98013

A broadband linear amplifier design is presented, suitable for application in TV transposers operating in band IV and V (470 to 860 MHz). The design is based on two BLV859 bipolar transistorscombined with quadrature hybrids. Typical results at the recommended class-A bias point (25.5 V/9.1 A) for the total module include 40 W peak sync output power at �54 dB three tone IMD level (fvision = �8 dB, fsound = �10 dB, fsideband = �16 dB) and an average gain of 10.5 dB in the (470 to 860) MHz range. 2 INTRODUCTION

The BLV859 is a bipolar linear push-pull power transistor designed to operate in the 460 to 860 MHz range. With a specified output power of 20 W peak-sync in class-A it is the largest device in the new generation of transposer transistors. The intermodulation distortion level is < �54 dB (fvision = �8 dB, fsound = �10 dB, fsideband = �16 dB) and power gain >10 dB at 860 MHz. For application in TV transposers for Band IV/V (470 to 860 MHz) a wideband linear power amplifier has been designed with two BLV859 transistors in class-A. 2.1 Ampli�er Electrical design objectives

The amplifier operates at a supply voltage of 25.5 V and a total current Ic = 9.1 A (2 � 4.55 A). Electrical characteristics (Ths = 25 °C, 25.5 V, 9.1 A, 470 to 860 MHz bandwidth) SYMBOL Power gain (small signal) Gain ripple (small signal) Output Power @ 1 dB compression Intermodulation: (�8 dB/�7 dB/�16 dB, Pref = 40 W) Input return loss/Output return loss 3 DESIGN OF THE AMPLIFIER Gp Griple Pout IMD1 IRL/ORL � 60 � � � MIN. 9.5 � � � � � � TYP. � ±1 � �50 �53 �15 MAX. dB dB W dB dB dB UNIT

Intermodulation: (�8 dB/�10 dB/�16 dB, Pref = 40 W) IMD2

The amplifier consists of 2 balanced circuits, both equipped with a BLV859 and coupled in parallel by means of a wideband 3 dB �90 degree sagewireline coupler at the input and output. 3.1 Mounting the transistors

For good thermal contact, heatsink compound should used when mounting the transistors on a heatsink. 3.2 Balun

Both input and output matching circuits of each BLV859 are connected to a coax BALUN which splits a 50 � unbalanced port in two 12.5 � ports. The BALUN has a transformation factor of 2. The construction of the BALUN is described in Fig.4. Essential for the BALUN is the shortcircuit between the inner and outerlead as can be seen in Figs 1 and 2. 3.3 Bias circuit

Each transistor has its own bias unit to obtain a stable DC setting. With the potentiometers P1 and P2 it�s possible to adjust the collector current of both BLV859 transistors. The nominal collector current should be 4.55 A.

1998 Mar 23

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