|
Usuarios conectados
Actualmente hay 6019 visitantes y 18 usuarios online.
|
Productos
|
Información
|
Destacado
|
|
|
|
|
No hay comentarios de productos.
Block Diagram
SV-163
SV-163
Block Diagram
SV-163 Board
Outline The SV-163 board controls tape transport of PCM3348HR. The SV-163 board consists of the following three main blocks. Description 1. Capstan servo block The capstan servo maintains the rotating speed of the capstan motor a constant speed. During the PLAY mode, the clutch attached to the capstan roller is energized to on so that the rotation of the capstan motor agrees with the rotation of the capstan roller in order to obtain the stable PLAY tape speed. The capstan rotating speed in the 24-bit mode is 1.5 times of that of the 16-bit mode, which is also realized by this block. The capstan servo block consists of the following four sub blocks. . Velocity servo block The velocity servo block controls the rotating speed of capstan motor, suppresses the rotation non-uniformity of the motor and improves the wow characteristics. The CAP FG signal represents the rotating speed of the capstan motor, and is 1 kHz sine wave signal when FS is 48 kHz in the 16-bit mode. Since the CAP FG signal is generated by the entire-circumference integration type FG of the capstan motor, the jitter component which can be induced by the non-uniform magnetization of the FG magnet is not included. The CAP FG is wave-shaped and sent to ICE4. Length of the CAP FG signal from the rise-up edge to the next rise-up edge is measured using the 192 FS signal in order to measure a cycle of the CAP FG signal. The CAP FG signal after waveform shaping is supplied to the FRC capture block of the capstan CPU (ICB4) where a cycle of the CAP FG is taken into the CPU by interrupting the CPU with the fall-down edge. The cycle data of the CAP FG which is taken into the CPU receives the gain correction and phase compensation operations, is DA converted by the built-in 12-bit PWM converter, and is output to outside the IC as the VEL ERR signal. . CTL servo block The CTL servo block has the function of locking in the phases of the PB CTL sync with that of the sector sync of the reference signal. Since the CTL frequency remains unchanged in the 16-bit mode and the 24-bit mode even though the capstan speed is different in the 16-bit mode and the 24-bit mode. Therefore, switching of circuit to use is not performed when operating mode is switched between the 16-bit mode and the 24-bit mode. The PB CTL signal which is picked up by the PB head during playback is sent to the CTK board where the PB sync signal only is extracted and is sent to the SV board. The PB sync signal which is received by the balanced type receiver (ICP9) is supplied to the FRC capture block of the CPU (ICB4). The CPU is interrupted by the fall-down edge of the PB sync. The sector clock signal which is generated by the CTK board is received by the balanced type receiver in the same manner, and is input to the FRC capture block of the CPU. The CPU is interrupted by the rise-up edge of the sector clock signal. The CPU detects the phase difference between the CTL PB sync and the sector clock. The phase difference is normalized by the reference cycle inside the CPU, receives the phase compensation and gain correction, is converted to the analog signal by the DA conversion using the PWM converter, so that the output signal PHASE ERR signal is output.
. FG servo block The FG servo block has the function of locking in the phase of the CAP FG signal of the capstan motor with the phase of the sector sync which is the reference signal. This mode is used only during the ADV recording mode and when the CTL PB sync cannot be reproduced due to dropout, etc. The reference signal is sector clock during the 16bit mode and N-SSYNC* during the 24-bit mode. The N-SSYNC* signal is re-shaped by ICE4 and supplied to the FRC capture block of the CPU where the phase difference is detected in the same way as in the CTL servo block. The phase difference signal receives normalization, phase compensation and gain correction, is converted to the analog signal by the DA conversion using the PWM converter, so that the output signal PHASE ERR signal is output. Either the PHASE ERR signal from the CTL servo block or the PHASE ERR signal from the FG servo block is selected inside the CPU depending upon the operating mode the machine, and is output. . Capstan motor driver block The VEL ERR signal is added with the PHASE ERR signal and the counter-motive voltage correction signal, and is supplied to the input of the three-phase motor driver which operates on the constant voltage driving system. 2. Reel servo block The reel servo block maintains the tape tension to a constant value, and also controls the motor during fast forward mode of tape. The reel servo block consists of the following three sub blocks. . Tension servo block The tape tension is detected by the tension sensors located on the mechanism chassis, amplified by the SE-289 board and is supplied to the SV board. The tape tension signal is received by a low-pass filter to remove noise. The tension difference between the tape tension value and the reference tension signal generated by the CPU (ICE7), and is supplied to the phase compensation block. The phase compensation block has the various phase compensation constants and gain values depending on the various reel sizes. The tape tension signal is added to the offset signal which is the tape diameter information data detected by the CPU (ICE7). The added result is the TENSION ERR signal. . Fast forward servo block The fast forward servo block determines the tape speed during fast forward mode. Tape speed is detected by the FG of the capstan roller which is attached to the capstan motor spindle. This FG signal is the two-phase FG signal detecting the tape running direction at the same time. This velocity signal is wave-shaped by the SE-289 board and is supplied to the SV board. This signal is converted from frequency-to-voltage (FV conversion) using the one-shot multi-vibrator type circuit. The target speed of tape is generated by the CPU and is converted to analog signal by DA conversion using the PWM converter of ICA7. The tape speed difference between the speed reference value and the speed of actual tape speed is detected, is gaincorrected depending upon the reel size and generates the VEL ERR signal. The VEL ERR signal is added to the TENSION ERR signal and are supplied to the reel motor driver. . Transport control block This block determines the target tension value and the target speed value from the commands supplied from the MC board depending on the operating mode, and from the present status of the tape transport. This processing is all performed by the software of the CPU (ICE7).
PCM-3348HR
4-58
4-58
|
|
|
> |
|