SONY PCGACRWD1
Manual de Servicio

IC

LTC1735CGN#TR (LINEAR TECHNOLOGY)
HIGH EFFICIENCY SYNCHRONOUS STEP-DOWN SWITCHING REGULATOR � TOP VIEW �

MD8408B (FUJIFILM MICRODEVICES)
IEEE 1394 PHYSICAL LAYER IC � TOP VIEW �

COSC 1 RUN/SS 2 ITH 3 FCB 4 SGND 5 VOSENSE 6 SENSE � 7 SENSE + 8

16 TG 15 BOOST 14 SW 13 VIN 12 INTVCC 11 BG 10 PGND 9 EXTVCC

PIN FUNCTIONS
COSC (Pin 1): External capacitor COSC from this pin to ground sets the operating frequency. RUN/SS (Pin 2): Combination of Soft-Start and Run Control Inputs. A capacitor to ground at this pin sets the ramp time to full output current. The time is approximately 1.25s/µF. Forcing this pin below 1.5V causes the device to be shutdown. In shutdown all functions are disabled. Latchoff overcurrent protection is also invoked via this pin as described in the Applications Information section. ITH (Pin 3): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is 0V to 2.4V. FCB (Pin 4): Forced Continuous/Synchronization Input. Tie this pin to ground for continuous synchronous operation, to a resistive divider from the secondary output when using a secondary winding or to INTVCC to enable Burst Mode operation at low load currents. Clocking this pin with a signal above 1.5VP�P disables Burst Mode operation but allows cycle-skipping at low load currents and synchronizes the internal oscillator with the external clock. SGND (Pin 5): Small-Signal Ground. All small-signal components such as COSC, CSS, the feedback divider plus the loop compensation resistors and capacitor(s) should single-point tie to this pin. This pin should, in turn, connect to PGND. VOSENSE (Pin 6): Receives the feedback voltage from an external resistive divider across the output. SENSE � (Pin 7): The (�) Input to the Current Comparator. SENSE + (Pin 8): The (+) Input to the Current Comparator. Built-in offsets between SENSE � and SENSE + pins in conjunction with RSENSE set the current trip threshold. EXTVCC (Pin 9): Input to the Internal Switch Connected to INTVCC. This switch closes and supplies VCC power whenever EXTVCC is higher than 4.7V. See EXTVCC connection in the Applications Information section. Do not exceed 7V on this pin and ensure EXTVCC � VIN. PGND (Pin 10): Driver Power Ground. Connects to the source of bottom N-channel MOSFET, the anode of the Schottky diode, and the (�) terminal of CIN. BG (Pin 11): High Current Gate Drive for Bottom N-Channel MOSFET. Voltage swing at this pin is from ground to INTVCC. INTVCC (Pin 12): Output of the Internal 5.2V Regulator and EXTVCC Switch. The driver and control circuits are powered from this voltage. Decouple to power ground with a 1µF ceramic capacitor placed directly adjacent to the IC together with a minimum of 4.7µF tantalum or other low ESR capacitor. VIN (Pin 13): Main Supply Pin. Must be closely decoupled to power ground. SW (Pin 14): Switch Node Connection to Inductor and Bootstrap Capacitor. Voltage swing at this pin is from a Schottky diode (external) voltage drop below ground to VIN. BOOST (Pin 15): Supply to Topside Floating Driver. The bootstrap capacitor is returned to this pin. Voltage swing at this pin is from a diode drop below INTVCC to (VIN + INTVCC). TG (Pin 16): High Current Gate Drive for Top N-Channel MOSFET. This is the output of a floating driver with a voltage swing equal to INTVCC superimposed on the switch node voltage SW.

FUNCTIONAL DIAGRAM

VIN 13 VIN COSC 0.8V REF SGND 5 0.17�A C� + 1.2V FORCE BOT DROP OUT DET + 0.86V � OV S Q R 2.4V 2k VOSENSE 6 R1 R2 0.8V VFB � + SD RUN SOFTSTART + OVERCURRENT LATCHOFF RC RUN/SS CSS 2 CC RSENSE 3 ITH SENSE + 8 7 SENSE � EXTVCC 9 4(VFB) SLOPE COMP EA 0.86V BURST DISABLE FC INTVCC A BUFFERED ITH 30k 30k 4.7V + � gm =1.3m� ICMP � I1 + 45k 45k � + I2 TOP ON 0.55V + � SD IREV BOT INTV V
IN CC

+

CIN

UVL INTV

COSC 1

4 FCB � 0.8V + TOP F FC BOOST 15

CC

DB VSEC CB

OSC

SYNC

TG 16

+
BOT SWITCH LOGIC B SW 14 D1 CSEC

VOUT

�

+

+
3mV

�

+
COUT 12 5.2V LDO REG

+
CINTVCC

1.2�A

6V

BG 11

PGND 10

Confidential
PCGA-CRWD1 (AM) 4-2