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7
Does pulse of L = 1.65V and H = 3.3V develop at pin 131 and L = 0V and H = 1.65V develop at pin 132 of IC401? Y Y Check signal process system following to IC402. Does RF output higher than 1 V(p-p) develop at pin 30 (TP502) of IC502? Y N
Disc playback is NG (DVD).
N
Is PLL locked? (Refer to waveforms.)
N
Check peripheral circuits of IC401 and IC306.
Check IC502. Lens cleaning.
N
Pin 43 of IC502 = 2.4V Pin 44 of IC502 = 3.0V
Pickup mechanism replacement
Y Check peripheral circuits of IC401 and IC306. Check peripheral circuits of IC502 and IC401.
Fig. 1-3-16
PLL works as a servo loop to generate a clock signal for reading RF signal binary data. With the PLL locked, the eye pattern is identified clearly when triggered with the read clock PLCK.
DVD RF signal
DVD playback waveform
DVD RF signal Pin 30 (TP502) of IC502
DVD RF signal Pin 30 (TP502) of IC502
V : 500 mV/div H : 50 ns/div
DVD PLCK Pin 117 (TP409) of IC401
Fig. 1-3-17
CH1 : TP502 DVDRF 500 mV/div CH2 : TP409 DVDPLCK 5 V/div 50 ns/div
Fig. 1-3-19
CD RF signal
CD playback waveform
CD RF signal Pin 30 (TP502) of IC502
CD RF signal Pin 30 (TP502) of IC502
V : 500 mV/div H : 100 ns/div
CD PLCK Pin 117 (TP409) of IC401 CH1 : TP502 CDRF 500 mV/div CH2 : TP409 CDPLCK 5 V/div 100 ns/div
Fig. 1-3-18
Fig. 1-3-20
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Parse Time: 0.255 - Number of Queries: 118 - Query Time: 0.052