AIWA CSDED79 EZ
Manual de Servicio

IC, LA9241ML Pin No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Pin Name
FIN2 FIN1 E F TB TE� TE TESI SCI TH TA TD� TD JP TO FD FD� FA FA� FE FE� AGND SP SPI SPG SP� SPD SLEQ SLD SL�

I/O
I I I I I O O I I I O I O I O O I O I O I � O I I I O I O I

Description
Connected to pickup photo-diode. Adding with FIN1 pin generates RF signal, and subtracting from FIN1 generates FE signal. Connected to pickup photo-diode. Connected to pickup photo-diode. Subtracting from F pin generates TE signal. Connected to pickup photo-diode. Input DC components of TE signal. Connected to TE pin with resistor set TE signal gain. Output TE signal. Input TES (TRACK ERROR SENSE) comparator. Band pass and input TE signal. Input shock detection. Establish tracking gain value. TA amplifier output. Compose tracking phase compensation value between TD and VR pins. Used for tracking phase compensation setting. Establish amplitude of tracking jump signal (kick pulse). Output tracking control signal. Output focusing control signal. Compose focusing phase compensation value between FD and FA pins. Compose focusing phase compensation value between FD� and FA� pins. Compose focusing phase compensation value between FA and FE pins. Output FE signal. Connected to FE pin with resistor set FE signal gain. Analog GND. Output single-end for CV+ and CV� pins input signal. Spindle amplifier input. Connect resistor for gain setting at spindle 12cm mode. (Not used) Connect spindle phase compensation value with SPD pin. Output spindle control signal. Connect sled phase compensation value. Output sled control signal. Input sled sending signal from DSP.

Pin No.
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

Pin Name
RFSM RFS� SLC SLI DGND FSC TBC NC DEF CLK CL DAT CE DRF FSS VCC2 REF1 VR LF2 PHI BHI LDD LDS VCC1

I/O
O O O I � O I � O I I I I O I � � O � � � O I � Output RF.

Description
Establish RF gain and 3T compensation value from EFM signal with RFSM pin. SLICE LEVEL CONTROL: Control data slice level by DSP with RF waveform. Control data slice level by DSP. Digital GND. Connected to focus search smoothing capacitor. TRACKING BALANCE CONTROL: Establish EF balance variable range. Not used. Output disc defect detection. Input reference clock. Inputs 4.23MHz from DSP. Input microcomputer command clock. Input microcomputer command data. Input microcomputer command chip enable. Detect RF: Output RF level detection. FOCUS SEARCH SELECT: Switches focus search mode (between ± search and + search against reference voltage). (Not used) Servo/digital VCC. Connected to reference voltage bypass condenser. Output reference voltage. Establish value in detecting disc defect. Connected to capacitor used to hold peak of RF signal. Connected to capacitor used to hold bottom of RF signal. APC-circuit output pin. APC-circuit input pin. RF VCC.

SL+ JP� I JP+ TGL TOFF TES HFL SLOF CV� I CV+ Input CLV error signal from DSP. I I O O I Input tracking gain control signal from DSP. TGL = "H" : Gain low. Input tracking off control signal from DSP. TOFF = "H" : Off. Output TES signal to DSP. HIGH FREQUENCY LEVEL: Detects whether main-beam is on pit or mirror position. Input sled servo off control. Input tracking jump signal from DSP.

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